Design Engineer

Position Description:

Job Description: RTL Hires for Foundation RTL team in SVDC (Sunnyvale, CA)Job: To develop, write and debug Verilog RTL to support pervasive logic (DFT, Scan, LBIST, JTAG, MBIST, Clocks, Reset, & Debug ) for a next generation microprocessor. These activities include developing new feature functionality, modifying RTL to support timing closure and supporting verification via ongoing bug fixes and testing.

Qualifications:

The ideal candidate should have a Master’s degree in Electrical or Computer Engineering or equivalent with a minimum of 3 years of chip industry experience. Ideally, the experience should be a mixture of RTL experience, DFT knowledge and physical design knowledge. Good communications skills are also desirable due to a working environment that requires collaboration amongst members of distributed project teams.