GPU Physical Layout Designer

Visualize your future . . . We DoNVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people and our technologies, support and fund industry research around the world, and consistently deliver high-quality products. NVIDIA's culture promotes and inspires a team of world-class employees to be at the top of their game. We've created an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow. . . today. We invite you to explore the opportunities available at NVIDIA to see what your future may hold. GPU PHYSICAL LAYOUT DESIGNER #901666

Work closely with product design engineers to perform PCB layout of high speed/high density value conscious PCBs for PC desktop and mobile graphics solutions, Personal handheld devices and other PC multimedia related products, all using Cadence PCB design tools Allegro 15.7 and Concept. The role focuses on complete development of CAD layout from symbol creation, floor planning and detailed component placement, through constraints management, with a concept of topology and signal/trace integrity. Designs releases require generation of Gerber files, ODB++, test reports, and electronic PCB documentation. Designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations. Minimum Requirements:B.S.E.E or equivalent experience 5 + years experience in PC graphics, cell phone design, motherboard design, mobile or related area. Detailed knowledge of circuit design and consideration for layout, routing and timing constraints, DFM, DFA, DFT constraints in volume manufacturing. Expert Allegro user Strong knowledge in High Density interconnect EOE

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