Information Technology System Administrator

Information Technology System Administrator

Responsibilities:

· Design, implement, and manage network (LAN, WAN, VPN) infrastructures

· Management of server infrastructure  (Windows and Linux)

· Design and maintain application infrastructure (CRM, compute servers, license servers, etc...)

· Direct technical support of Windows and Linux desktop users

· Maintenance of company website 

Qualifications:

Administrative knowledge of Linux, preferably with Red Hat

Administrative knowledge of Windows Server 2003, Active Directory, and Exchange 2003

Development with LAMP(Linux, Apache, MySQL, Perl/PHP), HTML, and shell scripting

Degree in Computer Science or Computer Information Management

 

The companyis a privately held company founded in 2005 with a simple mission: to raise the bar on Embedded Memory performance for converged SoC applications using standard CMOS logic processing.

Their Embedded Memories are compiler generated and are optimized based on customer selected design criteria: power, density, speed, aspect ratio, DFM and DFT.

The growth in SoC designs for converged applications continues to drive the need for increased amounts and types of high performance Embedded Memories: coolSRAM-6T™, coolSRAM-1T™, coolROM™, coolCache™, coolREG™, and coolOTP™. Hierarchical memory designs have become more critical to ensure a match between processor speed requirements and memory access capabilities.

In addition, increased interconnect, I/O bandwidth, and limitations on power consumption continue to drive a greater need for Embedded Memory integration. Process scaling will continue to present challenges for sense amp design margins, higher yield loss, higher leakage currents (read cycle scaling of 0.7x per generation for CMOS SRAM).

Accordingly, SoC designers who want a competitive edge for their products need to leapfrog the power, density, and speed of currently available Embedded Memories while keeping pace with advances in process scaling for future product generations.

Their line of optimized compiler-driven Embedded Memories breaks through these existing conventional limits, providing unprecedented opportunity to pack more functionality in SoC designs, reduce SoC footprints, and eliminate expensive off-chip components.