Verification Engineer, Staff

Innovation. Excellence. Integrity. Not just abstract concepts at LSI Corporation, but the way we conduct business with customers, partners, and key stakeholders. Add individual responsibility to the mix and you have the recipe for a dynamic environment, technological achievement, challenging career opportunities, and the potential for personal growth. Employees at LSI understand that they are helping to shape the future of technology in the storage and consumer markets. That’s why we’re always looking for the best and the brightest to join our winning team. Position Description:Responsibilities include the development of high-level verification environments for million-plus gate SAS/SATA-based standard product ICs. The ideal candidate will have:• Extensive Verilog experience with SOC verification environments. (Experience with MTI a plus.) • SCSI, ATA, SAS or SATA background • Experience developing bus functional models • Shell scripts and Perl expertise • Experience with high level verification languages such as SystemC, SystemVerilog, Vera or Specman, as well as C / C++ programming backgroundThis position requires the use of various other support tools for verification including the Cadence or MTI simulation tool suites, code coverage, assertion implementation and evaluation. A strong candidate will also have excellent communication skills as detailed documentation of test plans and test matrixes is a requirement. To Apply Visit LSI CorporationQualifications:BSEE or equivalent5 years experience minimum