ASIC Design Engineer, Sr

ASIC Design Engineer, Sr.

Will work with Chip lead and System Architecture group for architecture/implementation tradeoffs. Candidate will develop ASIC functional specification. Further, the candidate will participate in complete ASIC development process – micro-architecture, design of key functional blocks, RTL design, synthesis, block-level verification etc.

Masters degree desired. Bachelor's degree required. 10+ year's of relevant experience in ASIC design field. Strong background in networking domain is required. Must have participated in a recent multi-million gate ASIC project. Very good understanding of key networking protocols/standards such as SONET, GbE, 10GbE, G.709 OTN, Fibre Channel is desired. Must have strong micro-architecture/logic design skills & expertise in Verilog language & expertise is ASIC design methodology for 90nm and below.

Candidate should possess very good communication skills and ability and desire to work in a geographically diverse team environment (of peers and mentoring of junior engineers). ASIC