ASIC Lead Verification

Conexant’s innovative semiconductor solutions are driving broadband communications and digital home networks worldwide. The company has leveraged its expertise and leadership position in modem technologies to enable more Internet connections than all of its competitors combined, and continues to develop highly integrated silicon solutions for broadband data and media processing networks. The company’s semiconductor solutions are found in devices that connect personal access products such as PCs, set-top boxes, and game consoles to voice, video and data processing services over broadband and dial-up connections. They are also used by service providers to deliver broadband data, voice and video content to homes and business around the world. Conexant is a fabless semiconductor company that recorded more than $900 million in revenues in fiscal year 2004. The company has approximately 2,400 employees worldwide, and is headquartered in Newport Beach, Calif. The company also has major operations in San Diego, Calif., Palm Bay, Fla., Red Bank, N.J., and in India. To learn more, please visit us at www.conexant.com

Position Description:

As lead ASIC verification engineer you will be responsible for the oversight and implementation of logical verification of multi-million gate SOCs for set top box development.Key Responsibilities•Provide main point of contact between local design group and ASIC verification / emulation engineers at other company development sites.•Define block, module, subsystem and full-chip verification flows. Integrate industry standard and company proprietary tools into verification flow using Verilog 2001, SystemVerilog, C++, and Python scripts.•Develop and critically review block, module, subsystem, and chip-level test plans for digital video processing, memory controller, digital video interfaces, digital audio interfaces, computer system interfaces, embedded processor peripherals, design-for-test support hardware, programmable signal processors, or other system-on-a-chip functions. Guide other verification engineers and ASIC design engineers in writing test plans.•Implement self-checking verification tests at the block, module, subsystem, and full-chip levels. Develop and guide others in developing reference and bus-functional models used for self-checking tests. •Increase team's overall verification efficiency by incorporating formal verification, constrained random tests, and other techniques into test plans and test implementation. Define guidelines for inclusion of assertions and/or monitors in tests and design code to enhance test coverage and fault reporting. Formulate strategy and tactics for test reuse within a project and across projects.•Prepare reports and presentations summarizing verification status. Make feature recommendations to enhance performance, testability, and silicon debug efficiency.•Implement and use automation software to track code coverage, attribute coverage, resource usage, database activity, and bug rates over different test plans and hierarchical verification levels.•Customize the verification environment to provide appropriate vectors for manufacturing test, debug, bring-up, and other silicon analysis applications.

To Apply Visit Conexant Systems, Inc.

Qualifications:

Required Technical Skills and Experience•Excellent understanding of SOC verification with embedded CPU.•Extensive experience logically verifying digital interfaces, video processing logic, memory controllers, high-speed digital system interfaces, embedded CPU complex and peripherals, or system-on-a-chip DFT features.•Experience with post-silicon debug.•Experience in specifying and developing test programming interfaces and verification flows.•Direct experience in front-end ASIC design methodologies and tools for design capture and analysis, formal verification, and simulation. Understanding of limitations in particular vendor's tools.•Experience in a hardware design language (SystemVerilog preferred), systems programming language (C/C++, Java, etc.), a scripting language (Python, Perl, TCL, etc.), and a formal assertion language (Property Specification Language, Specman "e", Sugar, etc.).•Experience using the UNIX operating system or a derivative in an ASIC verification environment.•Excellent organizational, interpersonal, verbal, written, and presentation skills.•Ability to lead a team verification effort in an ASIC system-on-a-chip design environment, with the skills to mentor less experienced team members or team members with different expertise•Typically requires an MS or BS degree with specialization in Electrical Engineering, Computer Engineering, or Computer Science.•Candidates with an MS degree should have 7+ years experience in ASIC logic verification; those with a BS degree would usually need 9+ years.