Engineer, Principal Physical Design / 07-08566

Position Description:Broadcom is developing solutions supporting the next generation of 3G and 4G high-speed mobile technologies. As part of the CellAirity™ Mobile Platform, Broadcom offers a family of HSDPA (High-Speed Downlink Packet Access), WCDMA (Wideband Code Division Multiple-Access), EDGE (Enhanced Data Rates for GSM Evolution), GPRS (General Packet Radio Services) and GSM (Global System for Mobile Communication) baseband processors for use in cellular handsets, PC cards and other wireless-enabled consumer electronics.This senior-level individual will be part of our experienced and motivated mobile & wireless team responsible for cellular and multimedia product. Your main responsibilities will be integrating IP from RTL to GDS. Tasks including logic/physical synthesis, floorplanning, timing driven place and route, static timing analysis, signal integrity analysis and physical verification.You will also have an opportunity to define next generation physical implementation methodology, signal integrity analysis (Power, Noise) and logical/physical synthesis for high speed processor and SoC design.The ideal applicant should have hand-on experience with RTL to GDSII flow, DFM and signal integrity in deep submicron process. Technical expertise at timing driven P&R, static timing analysis and PERL/TCL scripting is a must.Qualifications:Typically requires a BS degree and 12 years of experience, an MS degree and 9 years of experience or a PhD and 6 years of experience.Hand-on experience in Magma & synopsys tools is essentialExperience in timing driven P&R, static timing analysis and PERL/TCL scriptingSolid experience in full synthesis to GDS flowExperience in DFM and signal integrity analysisExperience of 65nm/90nm design methodology preferred.Self motivated, with good verbal/written communication skills and able to work well in a small but growing teamAbility to work under intensive pressure and tight schedule