Test Staff Engineer

Conexant’s innovative semiconductor solutions are driving broadband communications and digital home networks worldwide. The company has leveraged its expertise and leadership position in modem technologies to enable more Internet connections than all of its competitors combined, and continues to develop highly integrated silicon solutions for broadband data and media processing networks. The company’s semiconductor solutions are found in devices that connect personal access products such as PCs, set-top boxes, and game consoles to voice, video and data processing services over broadband and dial-up connections. They are also used by service providers to deliver broadband data, voice and video content to homes and business around the world. Conexant is a fabless semiconductor company that recorded more than $900 million in revenues in fiscal year 2004. The company has approximately 2,400 employees worldwide, and is headquartered in Newport Beach, Calif. The company also has major operations in San Diego, Calif., Palm Bay, Fla., Red Bank, N.J., and in India. To learn more, please visit us at www.conexant.com

Position Description:

The purpose of this job is to develop production test hardware and software for Mixed Signal IC's used in PCs, satellite, cable and terrestrial broadcast receivers. Support Design, System and Product Engineering and new product characterization.Develop robust, cost-effective, and high coverage production test solutions for consumer PCs, satellite, terrestrial, and/or cable set-top box receiver SOC ICs to ensure the quality of product delivered to customers.Contribute to, coordinate with, or lead a team of test engineers on multiple projects simultaneously. Work independently on assigned tasks.Provide status updates to management and teams, and use metrics to gauge effectiveness and timeliness of deliverables.Work with design and product teams on DFT strategy and test plans to ensure ATE test modes are included in chip design.Create or modify Verilog and VHDL test benches to verify test modes in simulation and generate vectors for ATE usage.Possibly use Mentor FastScan and/or Synopsys TetraMAX to validate scan coverage and generate vectors.Convert vectors from VCD or WGL to tester native format.Capture schematics and review PCB layouts for load boards and probe cards.Develop and debug tests for device blocks including core digital logic (using scan and functional patterns), memories (using BIST), JTAG boundary scan, PLLs, crystal oscillators, ADCs, DACs, comparators, voltage references, and interfaces (DDR memory, USB 2.0, PCI bus, SATA, LVDS, etc).The bulk of time will be spent working individually and with designers to debug test patterns and test modes, usually using ATEs on a test floor.Write, debug, and deliver sample, ESD, qualification, characterization, and production test programs for Verigy (formerly HP/Agilent) 93000 SOC automated test equipment.Perform accurate and rigorous measurements and analysis of timing, power, performance, and other parametrics for inclusion into device data sheets.Work with product engineers and overseas production facilities to set limits, and optimize yield, test time, and coverage.Analyze customer returns (RMAs) and enhance test program coverage as needed.

To Apply Visit Conexant Systems, Inc.

Qualifications:

B.S. in Electrical Engineering required, M.S. preferred. 5+ years of experience in Test Engineering.Experience with Verigy 93000 ATE including Pinscale and mixed-signal instrumentation is strongly desired.Experience with complex (300+ pin), high speed (200MHz+), mixed signal VLSI devices desired.C/C++ programming skills required, Verilog and VHDL experience desired.Must have superb problem solving, investigative, and deductive skills.Excellent written communication skills required, as is the ability to write analyses and present data effectively.Ability to multitask among several large projects.Ability or interest in managing other engineers a plus. Must be a self-starter and able to work with minimal direction.Experience with deep submicron processes (65nm, 90nm) and associated test methodology a plus.Must be comfortable working with overseas design centers by email and phone, and willing to call into meetings outside normal working hours.Must be comfortable working in a fast paced environment, must deliver workable solutions the first time, every time.Potentially up to 5% travel to USA, China, Taiwan, Korea, or Singapore. Language skills a plus.