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Engineer, Staff Design Verification Test
| Details |
Country: USA
Location: California-Silicon Valley/San Jose Silicon Valley/San Jose
Total applied: 46 Job Category:Engineering
Location:US-CA-Silicon Valley/San Jose
Status:Full Time, Employee
Occupations:RF/Wireless Engineering
Career Level:Experienced (Non-Manager)
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Engineer, Staff Design Verification Test
Marvell. Moving Forward Faster.Marvell offers revolutionary devices that touch every point of the communications infrastructure: switching, transceivers, wireless, PC connectivity, communications controllers, and storage. Our continuous cycle of innovations has enabled Marvell to consistently deliver the industry’s gold standard, emerging as the market leader in virtually all of our product categories.
Position Description:
Responsible for the design, verification, and evaluation of digital circuits in high-speed data communication ICs. Duties include specification, design, RTL coding, verification, synthesis, timing, chip integration, test pattern development, post silicon debugging. Oversee layout activities. Should have hands on experience for all aspects of chip development process with proficiency in front end tools and methodologies. Have gone through a minimum of two full chip development cycles. Knowledge of Ethernet physical layer a plus but not required. SOC integration experience a plus.
To Apply Visit Marvell Semiconductor
Qualifications:
Prefer BSEE/MSEE 4+ years of VLSI design experience.Must have good leadership and communication skills.
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